annotate scripts/control/system/syssetsignals.m @ 5762:0163e7d69161

[project @ 2006-04-14 15:37:38 by jwe]
author jwe
date Fri, 14 Apr 2006 15:37:38 +0000
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1 ## Copyright (C) 1996, 1998 Auburn University. All rights reserved.
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2 ##
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3 ## This file is part of Octave.
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4 ##
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5 ## Octave is free software; you can redistribute it and/or modify it
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6 ## under the terms of the GNU General Public License as published by the
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7 ## Free Software Foundation; either version 2, or (at your option) any
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8 ## later version.
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9 ##
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10 ## Octave is distributed in the hope that it will be useful, but WITHOUT
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11 ## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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12 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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13 ## for more details.
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14 ##
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15 ## You should have received a copy of the GNU General Public License
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16 ## along with Octave; see the file COPYING. If not, write to the Free
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17 ## Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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18 ## 02110-1301 USA.
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19
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20 ## -*- texinfo -*-
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21 ## @deftypefn {Function File} {} syssetsignals (@var{sys}, @var{opt}, @var{names}, @var{sig_idx})
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22 ## change the names of selected inputs, outputs and states.
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23 ##
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24 ## @strong{Inputs}
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25 ## @table @var
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26 ## @item sys
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27 ## System data structure.
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28 ##
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29 ## @item opt
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30 ## Change default name (output).
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31 ##
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32 ## @table @code
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33 ## @item "out"
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34 ## Change selected output names.
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35 ## @item "in"
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36 ## Change selected input names.
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37 ## @item "st"
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38 ## Change selected state names.
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39 ## @item "yd"
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40 ## Change selected outputs from discrete to continuous or
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41 ## from continuous to discrete.
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42 ## @end table
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43 ##
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44 ## @item names
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45 ## @table @code
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46 ## @item opt = "out", "in", "st"
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47 ## string or string array containing desired signal names or values.
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48 ## @item opt = "yd"
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49 ## To desired output continuous/discrete flag.
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50 ## Set name to 0 for continuous, or 1 for discrete.
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51 ## @end table
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52 ## @item sig_idx
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53 ## indices or names of outputs, yd, inputs, or
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54 ## states whose respective names/values should be changed.
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55 ##
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56 ## Default: replace entire cell array of names/entire yd vector.
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57 ## @end table
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58 ##
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59 ## @strong{Outputs}
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60 ## @table @var
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61 ## @item retsys
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62 ## @var{sys} with appropriate signal names changed
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63 ## (or @var{yd} values, where appropriate).
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64 ## @end table
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65 ##
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66 ## @strong{Example}
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67 ## @example
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68 ## octave:1> sys=ss([1 2; 3 4],[5;6],[7 8]);
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69 ## octave:2> sys = syssetsignals(sys,"st",str2mat("Posx","Velx"));
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70 ## octave:3> sysout(sys)
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71 ## Input(s)
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72 ## 1: u_1
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73 ## Output(s):
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74 ## 1: y_1
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75 ## state-space form:
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76 ## 2 continuous states, 0 discrete states
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77 ## State(s):
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78 ## 1: Posx
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79 ## 2: Velx
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80 ## A matrix: 2 x 2
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81 ## 1 2
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82 ## 3 4
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83 ## B matrix: 2 x 1
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84 ## 5
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85 ## 6
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86 ## C matrix: 1 x 2
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87 ## 7 8
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88 ## D matrix: 1 x 1
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89 ## 0
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90 ## @end example
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91 ## @end deftypefn
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92
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93 ## Author: John Ingram <ingraje@eng.auburn.edu>
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94 ## Created: August 1996
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95
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96 function retsys = syssetsignals (sys, opt, names, sig_idx)
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97
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98 if (nargin < 3 | nargin > 4)
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99 usage("retsys=syssetsignals(sys,opt,names{,sig_idx})");
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100 elseif (!isstruct(sys))
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101 error("sys must be a system data structure");
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102 elseif (isempty(opt))
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103 opt = "out";
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104 elseif( ! ischar(opt) )
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105 error("opt must be a string");
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106 elseif( ! (strcmp(opt,"out") + strcmp(opt,"yd") + ...
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107 strcmp(opt,"in") + strcmp(opt,"st") ) )
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108 error("opt must be one of [], ""out"", ""yd"", ""in"", or ""st""");
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109 elseif(nargin == 4)
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110 if(is_signal_list(sig_idx) | ischar(sig_idx))
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111 ## convert to vector of indices
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112 if(opt == "yd")
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113 sig_idx = sysidx(sys,"out",sig_idx);
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114 else
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115 sig_idx = sysidx(sys,opt,sig_idx);
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116 endif
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117 endif
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118
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119 ## check index vector
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120 if(min(size(sig_idx)) > 1)
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121 disp("syssetsignals: sig_idx=")
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122 disp(sig_idx);
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123 error("sig_idx must be a vector")
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124 endif
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125 endif
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126
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127 sig_vals = sysgetsignals(sys,opt);
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128
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129 ## make sure it's in state space form if state names are given
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130 if(strcmp(opt,"st"))
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131 sys = sysupdate(sys,"ss");
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132 endif
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133
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134 if(strcmp(opt,"yd") == 0)
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135 ## it's a signal name list we're changing
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136 if(!iscell(names))
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137 names = {names};
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138 endif
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139 if( (!is_signal_list(names)) & (!isempty(names)) )
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140 if(ischar(names{1}))
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141 warning("syssetsignals(opt=%s): converting string matrix \"names\" to a cell array of strings",opt);
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142 tmpstr = names{1};
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143 for ii=1:rows(tmpstr)
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144 names{ii} = deblank(tmpstr(ii,:));
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145 endfor
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146 else
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147 names
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148 error("parameter \"names\" must be a cell array of strings");
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149 endif
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150 endif
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151 nsigs = length(sig_vals);
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152
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153 if(nargin == 3)
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154 ## replace all signal names
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
155 if(length(names) != nsigs)
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
156 error("opt=%s, sig_idx omitted: names(len=%d) should have %d entries ", ...
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
157 opt,length(names),nsigs);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
158 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
159 sig_idx = 1:nsigs;
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
160 elseif(length(names) != length(sig_idx))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
161 ## replace specified signal names
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
162 error("opt=%s, sig_idx(len=%d), names(len=%d) mismatch",opt, ...
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
163 length(sig_idx), length(names));
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
164 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
165
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
166 for ii=1:length(sig_idx)
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
167 jj = sig_idx(ii);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
168 if(jj < 1 | jj > nsigs | jj != floor(jj+0.5))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
169 error("opt=%s, sig_idx(%d)=%d, %e: must be an integer between 1 and %d", ...
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
170 opt, ii, jj, jj, nsigs);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
171 endif
4771
b8105302cfe8 [project @ 2004-02-16 17:45:50 by jwe]
jwe
parents: 4030
diff changeset
172 sig_vals{jj} = names{ii};
3430
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
173 endfor
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
174
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
175 else
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
176 ## update yd
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
177 ## 1st check pathological case: no outputs
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
178 nout = sysdimensions(sys,"out");
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
179 if(nout == 0)
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
180 if(nargin != 3)
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
181 error("opt=%s, %d outputs, sysgetsignals cannot take 4 arguments", ...
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
182 yd,nout);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
183 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
184 if(!isempty(names))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
185 error("opt=%s, %d outputs, names is not empty");
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
186 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
187 sigvals = [];
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
188 else
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
189 nsigs = length(sig_vals);
4030
22bd65326ec1 [project @ 2002-08-09 18:58:13 by jwe]
jwe
parents: 3500
diff changeset
190 if(!isvector(names))
3430
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
191 error("syssetsignals: opt=yd, names(%dx%d) must be a vector", ...
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
192 rows(names), columns(names));
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
193 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
194 if(nargin == 3)
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
195 if(length(names) != nsigs)
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
196 error("opt=yd, sig_idx omitted: names(%d) should be length(%d)", ...
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
197 length(names), nsigs);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
198 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
199 sig_idx = 1:nsigs;
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
200 elseif(length(names) != length(sig_idx))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
201 error("opt=yd: length(names)=%d, length(sig_idx)=%d",length(names), ...
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
202 length(sig_idx) );
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
203 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
204
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
205 badidx = find(names != 0 & names != 1);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
206 if(! isempty(badidx) )
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
207 for ii=1:length(badidx)
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
208 warning("syssetsignals: opt=yd: names(%d)=%e, must be 0 or 1", ...
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
209 badidx(ii), names(badidx(ii)) );
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
210 endfor
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
211 error ("opt=yd: invalid values in names");
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
212 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
213
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
214 for ii=1:length(sig_idx)
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
215 jj = sig_idx(ii);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
216 if(jj < 1 | jj > nsigs | jj != floor(jj))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
217 error("sig_idx(%d)=%d, %e: must be an integer between 1 and %d", ...
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
218 ii,jj, jj, nsigs);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
219 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
220 sig_vals(jj) = names(ii);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
221 endfor
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
222 if(any(sig_vals == 1) & sysgettsam(sys) == 0)
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
223 warning("Setting system sampling time to 1");
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
224 printf("syssetsignals: original system sampling time=0 but output(s)\n");
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
225 disp(find(sig_vals==1))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
226 printf("are digital\n");
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
227 sys = syschtsam(sys,1);
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
228 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
229
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
230 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
231 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
232
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
233 if(strcmp(opt,"st"))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
234 sys.stname = sig_vals;
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
235 elseif(strcmp(opt,"in"))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
236 sys.inname = sig_vals;
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
237 elseif(strcmp(opt,"out"))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
238 sys.outname = sig_vals;
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
239 elseif(strcmp(opt,"yd"))
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
240 sys.yd = sig_vals;
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
241 endif
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
242
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
243 retsys = sys;
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
244
65b3519ac3a1 [project @ 2000-01-14 03:44:03 by jwe]
jwe
parents:
diff changeset
245 endfunction